1. Field of the Invention
The present invention generally relates to an output circuit which is able to adjust output voltage slew rate and output current and avoid short-circuit current. The output circuit of the present invention can apply in many different application for circuit restricted by output voltage slew rate; such as USB, to assure the properties of circuit comply with required specification.
2. Description of the Prior Art
Generally speaking, the signal of a circuit can be output from a simple inverter set 10; as shown in FIG. 1, which is serially connected with stage 11, stage 12, and so on to stage IN. The output circuit of such kind is pretty simple and fewer components arc required, which is very suitable for low speed, low cost application. However, the output voltage slew rate of the output circuit characteristic of these “simple” inverters is determined by the parasitic capacitor and the loading capacitor and is difficult to be adjusted by a user with simple method. Thus, in the situation that output signal is with high speed and high amplitude, the electromagnetic interference easily occurs, which seriously impacts the operation of the circuit.
Therefore, some restriction will be required for the output voltage slew rate for the application that the high-speed output signal and the electromagnetic interference should be put into consideration. As shown in FIG. 2, the U.S. Pat. No. 5,598,119 “Method and apparatus for a load adaptive pad driver” is showing how to do so. It is apparent that, with the control over the output voltage of PMOS and NMOS, the output voltage slew rate will be adjusted properly. In FIG. 2, the output circuit 20 generates slope signal with the slope generators 21 and 22, and the output voltage of PMOS and NMOS will be controlled properly by the comparators 24 and 25. So, the output voltage slew rate will be under control by controlling the slope of the slope signal generated by the slope generators 21 and 22. However, since the comparators 24 and 25 consist of OP, the change of the output voltage of PMOS and NMOS is limited by the bandwidth and the output voltage slew rate of OP. When the slope signal input to OP is with higher slope, the output voltage of OP will probably generate ripple, or even cause OP unstable.
Besides the problem associated with output voltage slew rate, the output circuit 20 also comes with short-circuit current problem. When the output voltage of the output driver 22 reaches the half of the output amplitude, PMOS and NMOS will conduct simultaneously, and which cause the circuit system to suffer short-circuit current problem that large amount of current coming through suddenly. The problem not only causes the large amount of current extremely increase all of a sudden but also creates large amount of heat, which seriously impacts the quality and the life of the circuit. Therefore, a well-designed output circuit shall take the two major issues above into account and provide better solutions thereof.